Liquid crystal display devices have a number of advantages, including their lighter weight, reduced depth and smaller power dissipation, over various other kinds of display devices, and have been used as a display device with a small screen such as a monitor for a cellphone as well as a big screen for a TV set. And even now, people are making every effort to further reduce their power dissipation and further cut down their size, particularly in their frame area.
A liquid crystal display device currently used generally includes one substrate with gate lines, source lines, pixel electrodes and switching elements and the other substrate with a counter electrode which faces all of those pixel electrodes in common. Such a liquid crystal display device typically displays a predetermined grayscale by controlling the transmittance of its liquid crystal layer with the potential of a pixel electrode changed with respect to a constant potential of the counter electrode.
Meanwhile, known as another type of liquid crystal display device is a device which includes pixel electrodes, switching elements and gate lines on one substrate and striped signal electrodes (data lines), instead of the counter electrode, on the other substrate (see Patent Document No. 1, for example). Such a liquid crystal display device typically conducts a display operation at an appropriate grayscale level by changing the potential of a signal electrode which is arranged on the other substrate separately from the substrate with the pixel electrodes. Such a configuration is called either a “counter source structure” or a “counter matrix structure”. In the counter source structure, the signal electrodes are arranged on the counter substrate, not the active-matrix substrate, and therefore, short circuit of source and gate lines and a signal delay due to a parasitic capacitance can be reduced on the active-matrix substrate. In the liquid crystal display device disclosed in Patent Document No. 1, each switching element has its source connected to an adjacent gate line and each gate signal is changed between three levels, thereby setting the potential at a pixel electrode to be a reference potential level during a write operation and getting the write operation done appropriately.